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MRF Computation to Identify Errors in Quantum Structures
As the present trend move towards the construction of circuits using Nano scale devices, the probability rate of occurrence of errors in these devices are high. Therefore, detailed study is required to identify the possibility of errors in this nanoarchitectures. In this paper we propose two elegant methods namely Probabilistic based design methodology  and Markov random field approach  to identify the occurrence of errors. Any arbitrary logic circuits can be expressed using these methods and logic operation is achieved by maximizing the probability of state configurations in logic networks. Maximizing the probability of state configurations is equivalent to minimizing a form of energy that depends on neighbor nodes in the network. Here the logic circuits such as Full adder, decoder, Multiplexer, D and T type FF are simulated using QCA automata tool and employed the above design methodologies to find the errors in these devices. Finally we conclude that probabilistic design based approach and MRF computation can dynamically be adopted to identify the structural and signal based faults occurring in the quantum scale devices.
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