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Performance Analysis of Effect of Underlap with Fixed Gate Length: GaN-based Double Gate MOSFET

G.M. Sharif Ullah Al-Mamun, Firuz Kabir, Md. Imran Hossain, Ashfaqur Rahman, Al Jubair Hossain, Sokhorio Margon D’Costa, Md. Rokib Hasan

Abstract


The effect of gate length 8 nm with underlap of double gate MOSFET has been designed for VLSI Technology. The evaluation process was followed by NEGF (non-equilibrium Green’s function) formalism using SILVACO ATLAS followed to ITRS–2013. The investigations on the threshold voltage, Sub threshold Slope, ION, IOFF, ION/IOFF, DIBL and switching characteristics of the electric field have been done with the simulation results. In the simulation, adopting symmetrical distances from source to gate and gate to drain (S-G and G-D) by fixing the gate length identical are cited as underlap. Here, the observation has been done for LUN = (0 to 4 nm) underlap length. GaN and HfO2 have chosen as channel material and dielectric material respectively. Proposed devices structure indicates that GaN-based DG-MOSFETs for LG = 8 nm with various underlap lengths is a promising candidate for the aspect of modern VLSI applications.


Keywords


GaN, underlap, DG-MOSFETs, DIBL, ION, SS, switching characteristics

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References


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