Review on Quantum Ballistic Transport Model

Abstract

Nanowire MOSFETs are perceived as a standout amongst the most encouraging possibility to expand Moore's law into nanoelectronics period. This paper audits the procedure, application, gadget material science and minimal demonstrating of Gate All around (GAA) nanowire MOSFETs. The most broadly utilized techniques for nanowire combination have been examined. The paper shows the different gadget enhancement methods and scaling capability of nanowire transistors. A process sensitivity study of silicon nanowire transistors at the end of the paper justifies the theory of nanowire FETs to carry forward the downscaling of MOSFETs in the sub-10 nm regime. Keywords: nanowire, scaling, MOSFET, VLS